How to change pci express bus mode. PCI interface in a computer: types and purpose. Photo. Local PCI bus for mobile PCs
If you ask which interface should be used for a solid-state drive that supports the NVMe protocol, then any person (who even knows what NVMe is) will answer: of course PCIe 3.0 x4! True, he will most likely have difficulties with justification. At best, we will get the answer that such drives support PCIe 3.0 x4, and interface bandwidth matters. It is, but all the talk about it began only when some drives in some operations became cramped within the framework of “regular” SATA. But between its 600 MB/s and the (equally theoretical) 4 GB/s of the PCIe 3.0 x4 interface there is simply an abyss, filled with a ton of options! What if one PCIe 3.0 line is enough, since this is already one and a half times larger than SATA600? Adding fuel to the fire are controller manufacturers who are threatening to switch to PCIe 3.0 x2 in budget products, as well as the fact that many users do not have such and such. More precisely, theoretically there are, but they can be released only by reconfiguring the system or even changing something in it that you don’t want to do. But I want to buy a top-end solid-state drive, but there are fears that there will be no benefit at all from this (even moral satisfaction from the results of test utilities).
But is this true or not? In other words, is it really necessary to focus exclusively on the supported operating mode - or is it still possible in practice? give up principles? This is exactly what we decided to check today. Let the check be quick and not pretend to be exhaustive, but the information received should be enough (as it seems to us) at least to think about it... For now, let's briefly get acquainted with the theory.
PCI Express: existing standards and their bandwidth
Let's start with what PCIe is and at what speed this interface operates. It is often called a “bus,” which is somewhat ideologically incorrect: as such, there is no bus to which all devices are connected. In reality there is a set of point-to-point connections (similar to many other serial interfaces) with a controller in the middle and devices attached to it (each of which could itself be a next-level hub).
The first version of PCI Express appeared almost 15 years ago. The focus on use inside a computer (often within the same board) made it possible to make the standard high-speed: 2.5 gigatransactions per second. Because the interface is serial and full-duplex, a single PCIe lane (x1; effectively an atomic unit) provides data transfer speeds of up to 5 Gbps. However, in each direction it is only half of this, i.e. 2.5 Gbps, and this is the full speed of the interface, not the “useful” one: to improve reliability, each byte is encoded with 10 bits, so the theoretical throughput of one PCIe line 1.x is approximately 250 MB/s each way. In practice, it is still necessary to transfer service information, and in the end it is more correct to talk about ≈200 MB/s of user data transfer. Which, however, at that time not only covered the needs of most devices, but also provided a solid reserve: just remember that the predecessor of PCIe in the segment of mass system interfaces, namely the PCI bus, provided a throughput of 133 MB/s. And even if we consider not only mass implementation, but also all PCI options, the maximum was 533 MB/s, and for the entire bus, i.e., such a PS was divided into all devices connected to it. Here, 250 MB/s (since for PCI, too, the total and not the useful throughput is usually given) per line - in exclusive use. And for devices that need more, it was initially possible to aggregate several lines into a single interface, in powers of two - from 2 to 32, i.e., the x32 version provided for by the standard could transmit up to 8 GB/s in each direction. In personal computers, x32 was not used due to the complexity of creating and wiring the corresponding controllers and devices, so the maximum option was 16 lines. It was (and is still used) mainly by video cards, since most devices do not require so much. In general, for a considerable number of them, one line is enough, but some successfully use both x4 and x8: just on the storage topic - RAID controllers or SSDs.
Time did not stand still, and about 10 years ago the second version of PCIe appeared. The improvements were not only about speeds, but a step forward was also taken in this regard - the interface began to provide 5 gigatransactions per second while maintaining the same encoding scheme, i.e., the throughput was doubled. And it doubled again in 2010: PCIe 3.0 provides 8 (rather than 10) gigatransactions per second, but the redundancy has been reduced - now 130 bits are used to encode 128, not 160 as before. In principle, the PCIe 4.0 version with another doubling of speeds is already ready to appear on paper, but we are unlikely to see it in hardware in the near future. In fact, PCIe 3.0 is still used in many platforms in conjunction with PCIe 2.0, because the performance of the latter is simply... not needed for many applications. And where needed, the good old method of line aggregation works. Only each of them has become four times faster over the past years, i.e. PCIe 3.0 x4 is PCIe 1.0 x16, the fastest slot in computers of the mid-2000s. This option is supported by top-end SSD controllers, and it is recommended to use it. It is clear that if such an opportunity exists, a lot is not a little. What if she doesn't exist? Will there be any problems, and if so, what are they? This is the question we have to deal with.
Testing methodology
It is not difficult to carry out tests with different versions of the PCIe standard: almost all controllers allow you to use not only the one they support, but also all earlier ones. It’s more difficult with the number of lanes: we wanted to directly test options with one or two PCIe lanes. The Asus H97-Pro Gamer board we usually use on the Intel H97 chipset does not support the full set, but in addition to the x16 “processor” slot (which is usually used), it has another one that operates in PCIe 2.0 x2 or x4 modes. We used this trio, adding to it the PCIe 2.0 “processor” slot mode in order to evaluate whether there was a difference. Still, in this case, there are no extraneous “intermediaries” between the processor and the SSD, but when working with a “chipset” slot, there is: the chipset itself, which is actually connected to the processor by the same PCIe 2.0 x4. It was possible to add several more operating modes, but we were still going to conduct the main part of the study on another system.
The fact is that we decided to take this opportunity and at the same time check one “urban legend”, namely the belief about the usefulness of using top processors for testing drives. So we took the eight-core Core i7-5960X - a relative of the Core i3-4170 usually used in tests (these are Haswell and Haswell-E), but which has four times more cores. In addition, the Asus Sabertooth X99 board found in the bins is useful to us today due to the presence of a PCIe x4 slot, which in fact can work as x1 or x2. In this system, we tested three x4 options (PCIe 1.0/2.0/3.0) from the processor and chipset PCIe 1.0 x1, PCIe 1.0 x2, PCIe 2.0 x1 and PCIe 2.0 x2 (in all cases, chipset configurations are marked in the diagrams with (c)). Does it make sense to turn to the first version of PCIe now, given the fact that there is hardly a single board that supports only this version of the standard and can boot from an NVMe device? From a practical point of view, no, but to check the a priori assumed ratio of PCIe 1.1 x4 = PCIe 2.0 x2 and the like, it will be useful to us. If the test shows that the bus scalability corresponds to theory, then it doesn’t matter that we have not yet been able to obtain practically significant ways to connect PCIe 3.0 x1/x2: the first will be identical to PCIe 1.1 x4 or PCIe 2.0 x2, and the second will be identical to PCIe 2.0 x4 . And we have them.
In terms of software, we limited ourselves to only Anvil’s Storage Utilities 1.1.0: it measures a variety of low-level characteristics of drives quite well, and we don’t need anything else. Quite the contrary: any influence of other components of the system is extremely undesirable, so low-level synthetics for our purposes have no alternative.
We used a 240 GB Patriot Hellfire as a “working fluid”. As it was established during testing, this is not a performance record-holder, but its speed characteristics are quite consistent with the results of the best SSDs of the same class and the same capacity. Yes, and there are already slower devices on the market, and there will be more and more of them. In principle, it would be possible to repeat the tests with something faster, but, in our opinion, there is no need for this - the results are predictable. But let’s not get ahead of ourselves, but let’s see what we got.
Test results
When testing Hellfire, we noticed that the maximum speed for sequential operations can only be “squeezed out” of a multi-threaded load, so this also needs to be taken into account for the future: the theoretical throughput is only theoretical, because the “real” data received in different programs under different scenarios will no longer depend on it, but on these very programs and scenarios - in the case, of course, when force majeure circumstances do not interfere :) These are exactly the circumstances we are now observing: it has already been said above that PCIe 1.x x1 is ≈200 MB/s, and that's exactly what we see. Two PCIe 1.x lanes or one PCIe 2.0 lanes are twice as fast, and that's exactly what we're seeing. Four PCIe 1.x lanes, two PCIe 2.0 or one PCIe 3.0 are still twice as fast, which was confirmed for the first two options, so the third is unlikely to be different. That is, in principle, scalability, as expected, is ideal: the operations are linear, flash handles them well, so the interface matters. Flash stops cope well to PCIe 2.0 x4 for recording (which means PCIe 3.0 x2 is also suitable). Reading “may” be more, but the last step already gives one and a half, and not twofold (as it potentially should be) increase. We also note that there is no noticeable difference between the chipset and processor controllers, and between platforms as well. However, LGA2011-3 is a little ahead, but only slightly.
Everything is smooth and beautiful. But does not tear templates: the maximum in these tests is only slightly more than 500 MB/s, and this is quite capable even of SATA600 or (in the application to today's testing) PCIe 1.0 x4 / PCIe 2.0 x2 / PCIe 3.0 x1. That’s right: don’t be alarmed by the release of budget controllers for PCIe x2 or the presence of only so many lines (and the 2.0 version of the standard) in the M.2 slots on some boards when more is not needed. Sometimes you don’t need that much: maximum results were achieved with a queue of 16 commands, which is not typical for mass-produced software. More often there is a queue with 1-4 commands, and for this you can get by with one line of the very first PCIe and even the very first SATA. However, there are overheads and other things, so a fast interface is useful. However, being too fast is perhaps not harmful.
Also, in this test the platforms behave differently, and with a single command queue - fundamentally differently. The “trouble” is not that many cores are bad. They are not used here anyway, except perhaps one, and not so much that the boost mode is fully deployed. So we have a difference of about 20% in core frequency and one and a half times in cache memory - in Haswell-E it operates at a lower frequency, and not synchronously with the cores. In general, a top-end platform can only be useful for knocking out the maximum “Yops” through the most multi-threaded mode with a large command queue depth. The only pity is that from the point of view of practical work, this is completely spherical synthetics in a vacuum :)
On the recording, the situation has not changed fundamentally - in every sense. But what’s funny is that on both systems the PCIe 2.0 x4 mode in the “processor” slot turned out to be the fastest. On both! And with multiple checks/rechecks. At this point you can’t help but think about whether you need these are your new standards Or is it better not to rush anywhere at all...
When working with blocks of different sizes, the theoretical idyll is shattered by the fact that increasing the speed of the interface still makes sense. The resulting figures are such that a couple of PCIe 2.0 lanes would be enough, but in reality in this case the performance is lower than that of PCIe 3.0 x4, albeit not by several times. And in general, here the budget platform “clogs” the top one to a much greater extent. But it is precisely this kind of operation that is found mainly in application software, i.e. this diagram is the closest to reality. As a result, it is not surprising that thick interfaces and fashionable protocols do not provide any “wow” effect. More precisely, those switching from mechanics will be given, but exactly the same as any solid-state drive with any interface will provide him.
Total
To make it easier to perceive the picture of the hospital as a whole, we used the score given by the program (total - for reading and writing), normalizing it according to the PCIe 2.0 x4 “chipset” mode: at the moment it is the most widely available, since it is found even on LGA1155 or AMD platforms without the need to “offend” the video card. In addition, it is equivalent to PCIe 3.0 x2, which budget controllers are preparing to master. And on the new AMD AM4 platform, again, this is exactly the mode that can be obtained without affecting the discrete video card.
So what do we see? The use of PCIe 3.0 x4, if possible, is certainly preferable, but not necessary: it brings literally 10% additional performance to mid-class NVMe drives (in its initially top segment). And even then - due to operations that are generally not so common in practice. Why is this particular option implemented in this case? Firstly, there was such an opportunity, but the reserve is not enough for the pocket. Secondly, there are drives even faster than our test Patriot Hellfire. Thirdly, there are areas of activity where loads that are “atypical” for a desktop system are quite typical. Moreover, this is where the performance of the data storage system, or at least the ability to make part of it very fast, is most critical. But this does not apply to ordinary personal computers.
In them, as we see, the use of PCIe 2.0 x2 (or, accordingly, PCIe 3.0 x1) does not lead to a dramatic decrease in performance - only by 15-20%. And this despite the fact that in this case we limited the potential capabilities of the controller by four times! For many operations this throughput is sufficient. One PCIe 2.0 line is no longer enough, so it makes sense for controllers to support PCIe 3.0 - and given the severe shortage of lines in a modern system, this will work well. In addition, x4 width is useful - even if there is no support for modern versions of PCIe in the system, it will still allow you to work at normal speed (albeit slower than it could potentially) if there is a more or less wide slot.
In principle, a large number of scenarios in which the flash memory itself turns out to be the bottleneck (yes, this is possible and is inherent not only in mechanics) leads to the fact that the four lanes of the third version of PCIe on this drive are about 3.5 times faster than the first one - the theoretical throughput of these two cases differs by 16 times. Which, of course, does not mean that you need to rush to master very slow interfaces - their time is gone forever. It’s just that many of the possibilities of fast interfaces can only be realized in the future. Or in conditions that an ordinary user of an ordinary computer will never directly encounter in his life (with the exception of those who like to compare themselves with who knows what). Actually, that's all.
PIO– When using this mode, the CPU controls the reading of data from the disk, which leads to increased load on the CPU and slower operation in general.
The ATA 2/EIDE and ATA 3 standards provide several modes for fast data exchange with hard drives. The description of these modes forms an essential part of the standard, which owes its appearance largely to these new capabilities. Most modern high-speed hard drives can operate in so-called PIO 3 and PIO 4 modes, in which the data transfer speed is very high. The speed of data exchange with the hard drive depends on the choice of PIO (programmed input/output) mode. In the slowest mode (mode 0), the duration of one data transfer cycle does not exceed 600 ns. Each cycle transfers 16 bits of data, so the theoretically possible transfer rate in mode 0 is 3.3 MB/s. Most modern hard drives support PIO 4 mode, in which data transfer speeds reach 16.6 MB/s.
Parallel ATA DMA data exchange modes
DMA – The drive itself controls the data flow, reading data into or out of memory with little or no CPU intervention. The CPU issues commands to perform a particular action.
Direct Memory Access (DMA) transfer means that, unlike PIO mode, data is transferred directly from the hard drive to system (main) memory, bypassing the CPU. This frees the processor from most of the data communication with the disk. In addition, while transferring data from disk to memory, the processor can perform other useful work. There are two types of DMA: single-word (8-bit) and multi-word (16-bit). Single-word DMA modes were removed from the ATA 3 standard and later specifications and are no longer used. DMA modes that use a host adapter that supports bus control technology are called Bus Master ATA modes. In the first case, request processing, bus capture and data transfer are carried out by the DMA controller on the motherboard. In the second case, all these operations are performed by an additional high-speed chip, also mounted on the system board.
- Development of the PCI bus. Devices running on the PCI bus
Local PCI bus
The PCI (Peripheral Component Interconnection) bus was announced by Intel in 1992 at the PC Expo.
- 32-bit data link between processor and peripheral devices
- operates at a clock frequency of 33 MHz
- Maximum throughput 120 MB/s
When working with i486 processors, the PCI bus gives approximately the same performance indicators as the VL-bus.
The PCI bus is processor-independent (the VL-bus connects directly to the i486 processor).
PCI operates at 66 MHz.
32 bits – at 33 MHz (132 MB/s).
64 bits – at 33 MHz (264 MB/s), 66 MHz (528 MB/s).
Connected devices: audio cards, network cards, video cards.
You can connect cards to the PCI bus connector: those with power supply: 5 V (key 50, 51 pins), 3.3 V (key 12, 13) and universal (key 12, 13, 50, 51 pins). A 32-bit slot has 62 contacts on each side, a 64-bit slot has 94. This bus allows you to connect up to four devices simultaneously, that is, it can have up to four connectors. To use a larger number of connected devices, a special chip is used - a bus bridge - to connect two buses.
Development of the PCI bus
№ | Year | Name |
PCI v.1.0 | ||
PCI v.2.0 (PCI Plug & Play) | ||
PCI v.2.1 (PCI Power Manager) | ||
PCI v.2.2 (PCI Hot Plug) | ||
PCI-X v.1.0 (Mini PCI) | ||
2001-2002 | PCI-X v.2.0 and PCI Express v.1.0 and PCI v.2.3 | |
PCI Express v.1.0a (PCI Express mini, PCI Bridge) | ||
PCI v.3.0, PCI Express x16 (Graphics) | ||
PCI Express v.1.1 | ||
PCI Express v.2.0 | ||
PCI Express v.3.0 | ||
2013-2014 | PCI Express v.4.0 |
PCI 2.2– 64-bit bus width and/or 66 MHz clock frequency are allowed, i.e. peak throughput up to 533MB/sec
PCI-X– 64-bit PCI 2.2 version with frequency increased to 133 MHz (peak bandwidth 1066MB/sec)
PCI-X 266(PCI-X DDR), DDR version of PCI-X (effective frequency 266 MHz, real 133 MHz with transmission on both edges of the clock signal, peak bandwidth 2.1 GB/sec
PCI-X 533(PCI-X QDDDR)6 QDR version of PCI-X (533 MHz effective frequency, 4.3 GB/s peak bandwidth)
Mini PCI– PCI with SO-DIMM style connector, used primarily for miniature network, modem and other cards in laptops
Compact PCI– standard form factor (modules are inserted from the end into a cabinet with a common bus on the rear plane) and connector intended primarily for industrial computers and other critical applications
Accelerated Graphics Port (AGP)– high-speed PCI version optimized for graphics accelerators
Real frequency – the frequency at which data is transmitted (clock generator frequency).
Effective frequency – frequency corresponding to the standard (real frequency multiplied by the number of bits transmitted per clock cycle). If two bits of data are transmitted in one clock cycle, then the effective frequency will be twice the real one.
Local PCI bus for mobile PCs
- PCI Express for mobile devices as the ExspressCard standard.
- Laptops and miniature desktop PCs were the first to receive module support.
ExpressCard technology has replaced all outdated parallel buses; most use modern interfaces - PCI Express, USB 3.0
Local PCI bus
There are no more than 4 devices (slots) on one PCI bus.
PCI Bridge – (bus bridge) hardware for connecting PCI to other buses.
- Host Bridge main bridge – for connecting PCI to the processor bus
- Peer to Peer Bridge - to connect two PCI buses
PCI performance:
GT/s – giga-transfers/second (billions of transfers per second). Used as a numerical characteristic of the speed of working with RAM of Intel processors.
Actual memory speed depends on the processor.
Conversion to Gbps for PCIe 3.0 (8x):
64GT/s*(128b/130b) – 63.01Gbps
Local PCIe bus
PCI Express 2.0 signal transfer rate is 5 GT/s, that is, the throughput is equal to 500 MB/s for each line.
PCI Express 2.0, which typically uses 16 lanes, provides bidirectional throughput of up to 8 GB/s.
The PCI Experss 2.0 standard uses an 8b/10b encoding scheme, where 8 bits of data are transmitted as 10-bit characters for the error correction algorithm. As a result, we get 20% redundancy, that is, a reduction in useful throughput.
PCI Express 3.0 uses a signaling rate of 8 GY/s, which gives a throughput of 1 GB/s per lane (16 GB/s).
PCI Express 3.0 moves to a more efficient 1128b/130b encoding scheme, eliminating 20% redundancy.
8 GT/s is a “theoretical” speed, but the actual speed is comparable in performance to the signal speed of 10 GT/s if the 8b/10b encoding principle were not used.
In 2011, the PCI SIG announced the PCI Express (PCIe) 4.0 computer bus standard, which will provide a record throughput of 16 gigatransfers per second per lane, which is twice the speed limit of the PCIe 3.0 bus.
16 GT/s corresponds to speeds of approximately 2 Gb/s per x1 lane.
- USB bus. History of development, types, characteristics. Difference from IEEE 1394 FireWire
USB bus
Compaq, DEC, IBM, Intel, NEC, etc. (1993)
Project requirements:
- Users should not install switches and jumpers
- Users should not disassemble the system unit
- there must be a single connector for connecting devices
- I/O devices must be powered via cable
- ability to connect up to 127 devices
- support for real-time devices
- ability to install equipment without rebooting or shutting down the PC
- low production costs
USB 1.0 bus
In 1996, USB 1.0 (Universal Serial Bus) was a universal serial bus.
An industry standard for PC architecture extensions focused on peripheral integration.
2 baud rate modes:
- Low Speed (1.5 Mbit/s) – keyboard, joystick, mouse
- Full Speed (12 bit/s) – modems, scanners, printers
In 1998 USB 1.1 - problem fixes
USB 2.0 bus
In 2000 USB 2.0
Another operating mode, High Speed 480 Mbit/s, is added for high-speed devices (HDD, digital cameras, etc.).
USB 3.0 bus
In 2008 USB 3.0
USB 3.0 and USB 3.1 Gen1 bandwidth is 5 Gbps.
The new USB 3.0 interface is called SuperSpeed USB.
USB 3.0 remains fully compatible with existing USB 2.0 equipment.
To ensure reliable data transfer, the USB 3.0 interface uses 8/10 bit encoding.
One byte (8 bits) is transmitted using 10-bit encoding, which improves transmission reliability at the expense of throughput.
Ø The standard effectively optimizes energy consumption
Ø The USB 2.0 interface constantly polls the availability of devices, which consumes energy
Ø The USB 3.0 interface has four connection states, (U0-U3).
1) The connection state U0 corresponds to active data transfer.
2) If the connection is idle, then the ability to receive and transmit data will be disabled in the U1 state.
3) State U2 disables the internal clock.
4) State U3 puts the device into “sleep”.
The USB 3.0 standard is backward compatible with USB 2.0.
The USB 2.0 contacts remain in the same place, but five new contacts are now located deep in the connector.
USB 3.1 bus
In 2015 USB 3.1 b and new USB Type C connector
USB 3.1 SuperSpeed+
A feature of USB 3.1 Gen2 is the theoretical throughput increased to 10 Gbps
New Thunderbolt controllers provide 20 Gbps, and promising 40 Gbps
At CES 2015, USB-IF representatives assembled a stand with a pair of SSDs in a RAID 0 array connected via USB 3.1. The CrystalDisk Benchmark test utility showed a linear write speed of 817 MB/s.
USB Power Delivery 2.0 specifications increase the current capacity from 900 mA for USB 3.0 ports to 5000 mA for USB 3.1
Guaranteed enough to power capacious external hard drives and other powerful consumers from one port.
The USB Type-C port will eventually provide power to almost all devices with a power of up to one hundred watts.
A special feature of USB-C is the symmetrical design of the connector, allowing it to be connected to the port on either side. In terms of dimensions, it is identical to MicroUSB (8.3 * 2.5 mm).
Eight USB 3.1 pins can be used simultaneously for both file transfer and monitor connection via DisplayPort.
The rest provide power and connection to devices with the old USB 2.0 interface, such as keyboards and mice.
Difference from IEEE 1394 FireWire
Serial interfaces FireWire and USB, while having common features, are significantly different technologies. Both buses provide easy connection of a large number of control units (127 for USB and 63 for FireWire), allowing switching and switching on/off devices while the system is running. The topology of both buses is quite close. USB hubs are part of the control center; their presence is invisible to the user. Both buses have device power lines, but the power capacity for FireWire is significantly higher. Both buses support the PnP system (automatic configuration on/off) and eliminate the problem of shortage of addresses, DMA channels and interrupts. Bandwidth and bus management are different.
USB is aimed at control units connected to a PC. Its isochronous transmissions allow only digital audio signals to be transmitted. All transmissions are centrally controlled and the PC is the necessary control node located at the root of the bus tree structure. This bus does not support connecting multiple PCs.
FireWire is designed for intensive exchange between any devices connected to it. Isochronous traffic allows you to transmit live video. The bus does not require centralized control from the PC. It is possible to use the bus to connect several PCs and control units into a local network.
New digital video and audio devices have built-in 1394 adapters. Connecting traditional analog and digital devices (players, cameras, monitors) to the FireWire bus is possible through interface and signal converter adapters. Standard, uniform FireWire cables and connectors replace the many disparate connections between consumer electronics devices and PCs. Different types of digital signals are multiplexed onto one bus. Unlike Ethernet networks, high-speed real-time transmission of data streams over FireWire does not require additional protocols. In addition, there are arbitration facilities that guarantee access to the bus within a given time. The use of bridges in FireWire networks allows you to isolate the traffic of groups of nodes from each other.
- Logical surface structure of a logical disk
A logical disk or volume (volume or partition) is a part of a computer’s long-term memory, considered as a single whole for ease of use. The term "logical disk" is used in contrast to "physical disk", which refers to the memory of one specific disk medium.
Discs refer to machine storage media with direct access. Concept direct access means that the PC can “access” the track on which the section with the required information begins or where new information needs to be written, directly, wherever the drive’s write/read head is located.
Disk drives more varied:
- floppy magnetic disk drives (FMD), otherwise known as floppy disks or floppy disks;
- hard magnetic disk drives (HDD) of the Winchester type;
- drives on removable hard magnetic disks using the Bernoulli effect;
- optical CD drives CD-ROM (Compact Disk ROM);
- optical disk drives of type CC WORM (Continuous Composite Write Once Read Many - write once - read many times);
- Magneto-optical disk drives (NMOD), etc.
Magnetic disks(MD) refer to magnetic computer storage media. As a storage medium, they use magnetic materials with special properties (with a rectangular hysteresis loop) that make it possible to record two magnetic states - two directions of magnetization. Each of these states is associated with binary digits: 0 and 1. Memory media (MD) are the most common external storage devices in PCs. Disks are hard and flexible, removable and built into the PC.
A device for reading and writing information on a magnetic disk is called disk drive .
All disks: both magnetic and optical, are characterized by their diameter or, in other words, form factor. The most widely used drives are 3.5" (89 mm) form factors. 3.5" drives with smaller dimensions have higher capacity, shorter access times, and higher speeds for reading data in a row (transfer), higher reliability and durability.
Information on the MD (Fig. 4.) is written and read magnetic heads along concentric circles - tracks (tracks). The number of tracks on an MD and their information capacity depend on the type of MD, the design of the MD drive, the quality of the magnetic heads and the magnetic coating.
Rice. 4. Logical structure of the surface of a magnetic disk
Each MD track is divided into sectors . Sector- the smallest addressable unit of data exchange between a disk device and RAM. In order for the controller to find the desired sector on the disk, it is necessary to give it all the components of the sector address: surface number, cylinder (track) number and sector number.
One sector of a track usually contains 512 bytes of data. Data exchange between the NMD and the OP is carried out sequentially by an integer number of sectors.
Cluster- this is the minimum unit of information placement on a disk, consisting of one or more adjacent track sectors.
When writing and reading information, the MD rotates around its axis, and the magnetic head control mechanism brings it to the track selected for writing or reading information.
Data on disks is stored in files, which are usually identified with a section (area, field) of memory on these storage media.
File is a named area of external memory allocated for storing an array of data.
The memory field for the created file is allocated as a multiple of a certain number of clusters. Clusters allocated to one file can be located in any free disk space and are not necessarily adjacent. Files stored in clusters scattered across the disk are called fragmented.
For packages of magnetic disks (disks installed on one axis) and for double-sided disks, the concept of “cylinder” is introduced.
Cylinder is a set of MD tracks located at the same distance from its center.
- External PC devices. Classification and detailed description.
External devices
- External storage devices or external memory
- Input devices
- Output devices
- Multimed media
External memory refers to external PC devices and is used for long-term storage of any information.
Classification by characteristics:
- By type of media
- By type of design
- Based on the principle of writing and reading information
- By access method, etc.
Classification of VZU
1) External
· Tape
· Bobbin
· Cassette
3) Disk
· Magnetic
· Replaceable
· Non-replaceable
· Optical
· Mixed
Floppy disks
- 3.5 inches
- 1.44 MB
- 300 rpm
Causes damage:
- Warping floppy disk
- Opening the security curtain
- Exposure to a magnet
HDD - Hard Disk Drive (HDD) - hard magnetic disk
- Rotation speed: 7200 rpm, 10000 rpm
- Connection: IDE, SATA
- Audio CD
Diameter 12 cm
· 74-80 minutes of sound
- CD-ROM, CD-R, CD-RW
· 650-700 MB
CD-ROM - read only
CD-R - write once
CD-RW - multiple write
- mini CD (-R, RW)
Diameter 8 cm
· 24 minutes of audio, 210 MB
Advantages:
- reliability, durability
- low cost
Flaws:
- Low read/write speed
DVD (Video Disk) laser with a shorter wavelength
1) Single layer
- Single-sided 4.7 GB
- Double sided 9.4 GB
2) Double layer
- Single sided 8.5
- Double sided 17.1
DVD-ROM - read only
DVD-R, DVD+R - write once
DVD-RW, DVD-RW - multiple recording (1000 cycles)
HD DVD – high definition DVD (high definition)
Development: Toshiba in collaboration with NEC and SANYO
Support: Microsoft, Intel
Blu-ray Disc
Blu-ray Disk (BD) is a high-density optical disc format for storing data or high-definition video, using standard 12 and 8 cm diameter discs and a blue laser with a wavelength of 405 nm.
BD-RE (rewritable)
Based on memory chips (up to 1 TB) (laptops, netbooks, phones, tablets)
Advantages:
- They don't make noise
- High read/write speed
- Light weight
Flaws:
- Limited number of write cycles (100000)
- High price
Streamer
Streamer is a device for backing up data from a hard drive to magnetic tape.
Advantages:
- Capacity up to 4 TB
- Cheap magnetic tape
- Reliability
- High speed (up to 160 Mb/s)
Flaws:
- Sequential access to data (rewind" to the desired location)
- Slow search speed
- Only for data stream, extremely difficult to work with individual files
Manufacturers: Sony, IBM, Hewlett Packard
External devices
- Input devices
· keyboard - a device for manually entering numerical, text and control information into a computer;
· graphic tablets (digitizers) - for manually entering graphic information and images by moving a special pointer (pen) across the tablet; when you move the pen, the coordinates of its location are automatically read and these coordinates are entered into the computer;
· scanners (reading machines) - for automatic reading from paper media and entering typewritten texts, graphs, pictures, drawings into the computer;
· pointing devices (graphic manipulators) - for entering graphic information onto the monitor screen by controlling the movement of the cursor across the screen, followed by encoding the cursor coordinates and entering them into the computer (joystick, mouse, trackball, light pen);
· touch screens - for entering individual image elements, programs or commands from a split-screen display into a computer).
· Digital photo/video cameras allow you to receive video images and photographs directly in digital format.
- Output devices
· plotters (plotters) - for displaying graphic information on paper;
· printers - printing devices for outputting information onto paper.
Main types of printers:
- matrix - the image is formed from dots, the printing of which is carried out with thin needles striking the paper through an ink ribbon. The characters in a line are printed sequentially. The number of pins in the print head determines the print quality. Inexpensive printers have 9 needles. More advanced dot matrix printers have 18 and 24 pins;
- inkjet - in the print head there are thin tubes - nozzles, through which tiny droplets of ink are thrown onto the paper. The print head matrix usually contains from 12 to 64 nozzles. Currently, inkjet printers provide resolutions of up to 50 dots per millimeter and print speeds of up to 500 characters per second with excellent print quality approaching the quality of laser printing. Inkjet printers also perform color printing, but the resolution is approximately halved;
- laser - an electrographic method of image formation is used. The laser is used to create an ultra-fine light beam that traces the contours of an invisible dot electronic image on the Surface of a pre-charged photosensitive drum. After developing the electronic Imagination with dye (toner) powder adhering to the discharged areas, printing is performed - transferring the toner from the drum to paper and fixing the image on the paper by heating the toner until it melts. Laser printers provide the highest quality printing with high speed. Color laser printers are widely used.
User Dialog Tools
- video terminals (monitors) - devices for displaying input and output information. The video terminal consists of a video monitor (display) and a video controller (video adapter). Video controllers are part of the computer system unit (located on the video card installed in the motherboard connector). Video monitors are external computer devices. The main characteristic of a monitor is resolution, which is determined by the maximum number of dots located horizontally and vertically on the monitor screen. Modern monitors have standard resolution values from 640 X 480 to 1600 X 1200, but in reality there may be other values. Both color and monochrome monitors can be used;
The main characteristic of the monitor is the maximum number of points located horizontally and vertically on the screen.
The screen size is determined by its diagonal in inches
For example: 17"", 42"", 48""
Screen resolution from 640*480px, 5120*2880px
- devices for speech input/output of information. These include various microphone acoustic systems, as well as various sound synthesizers that convert digital codes into letters and words that are reproduced through speakers or speakers connected to a computer.
Communications and telecommunications
· Network adapters (modem - modulator-demodulator) are used to connect a computer to communication channels, other computers and computer networks.
· Faxes - These are devices for facsimile transmission (accurate reproduction of a graphic original (signature, document, etc.) by means of printing) of images over the telephone network.
· Fax modems are modems that can send and receive data like a fax.
- External PC devices (types of input/output ports, classification). Multimedia concept.
VESA (Video Electronics Standards Association) has published the DisplayPort 1.3 standard.
Bandwidth up to 32.4 Gbps (8.1 Gbps in each of four lines). Taking into account transmission overhead, the uncompressed video stream speed can reach 25.92 Gbps.
Convert video to vga, dvi, hdvi
HDCP 2.2 and hdmi 2.0 support with cec (TV applications, copy protection)
Supports 4:2:0 format, used in consumer television interfaces
Improved ability to transmit Display Port simultaneously with video of other data, such as USB 3.0
List of I/O ports commonly used in a personal computer:
- Parallel (LPT)
- Serial (COM)
- Game
- Ethernet connector
- PS/2 connector (mouse)
- PS/2 connector (keyboard)
- VGA connector and other video outputs
- Audio connectors for connecting speakers, microphone, etc.
I/O ports on an ATX form factor motherboard:
1 – PS/2 connector (mouse); 2 – PS/2 connector (keyboard); 3 – Ethernet output; 4 – Two USB connectors; 5 – Serial port connector; 6 – Parallel port connector; 7 – VGA connector; 8 – Game port; 9 – Audio ports (from left to right: line out, input, microphone).
Parallel Port (LPT)
The main feature of a parallel port is the simultaneous transmission of data over several lines. This feature brings LPT closer to the internal buses of a computer. The main purpose of a parallel port is to connect external devices, and in most cases this device is a printer.
The first versions of the parallel port were unidirectional, that is, data through the cable could only be transmitted in one direction - to the peripheral device. Subsequently, improved LPT interface standards were introduced, in which data could be transferred in both directions.
Serial port (COM)
This port features serial data transmission over a single line. Serial transmission means that bits of information are transmitted along the line one after another. In addition, data transmission on the serial port is bidirectional. Typically, COM is used to connect peripherals such as a mouse or modem. The port connector on the computer motherboard uses a 9-pin DE-9 male connector.
Game port
Today this port is not very often found on motherboards. In addition, it is not supported by modern operating systems such as Windows 7. However, it can still be seen on sound cards. The port connector is a 15-pin connector.
As you can guess from the name of the port, it is intended primarily for connecting joysticks. A special feature of the port is the ability to connect two devices to it at once. In addition, in sound cards, the game port is often used to connect MIDI devices, such as synthesizers. Since it is capable of working with analog and analog-to-digital devices, an analog-to-digital converter is built into the microcircuit that serves it.
The PS/2 connector is used on a computer to connect a mouse and/or keyboard. Despite the fact that it was developed quite a long time ago, back in the mid-1980s, nevertheless, it is still actively used in computers. Some motherboards have two universal connectors to which you can connect both a mouse and a keyboard, while others have two separate connectors for a mouse and a keyboard. The green connector is for connecting a mouse, the blue connector is for a keyboard. Both connectors are made in mini-DIN format with 9 pins.
The USB port, which will be discussed in detail in a separate article, is the fastest, most versatile and productive I/O port in modern computers. It is for this reason that USB has practically replaced many other ports. Typically, a computer uses several connectors to connect USB devices.
Multimedia- an interactive system that provides simultaneous presentation of various media - sound, animated computer graphics, video. For example, in one container object ( container) may contain text, auditory, graphic and video information, as well as, possibly, a method of interactive interaction with it.
Multimedia is a set of hardware and software that allows a person to communicate with a computer using a variety of natural environments: sound, video, graphics, texts, animation, etc. Multimedia tools include:
- speech input and output devices;
- microphones and video cameras, acoustic and video playback systems with amplifiers, sound speakers, large video screens;
- sound and video cards, video capture cards that capture images from a VCR or video camera and enter them into a computer;
- scanners;
- external mass storage devices on optical disks, often used for recording audio and video information
- video editors;
- professional graphic editors;
- tools for recording, creating and editing audio information, allowing you to prepare audio files for inclusion in programs, change the amplitude of the signal, add or remove the background, cut or paste blocks of data over a certain time period;
- programs for manipulating image segments, changing colors, palettes;
- programs for implementing hypertexts, etc.
The PCI Express standard is one of the foundations of modern computers. PCI Express slots have long occupied a strong place on any desktop computer motherboard, displacing other standards, such as PCI. But even the PCI Express standard has its own variations and connection patterns that differ from each other. On new motherboards, starting around 2010, you can see a whole scattering of ports on one motherboard, designated as PCIE or PCI-E, which may differ in the number of lines: one x1 or several x2, x4, x8, x12, x16 and x32.
So, let's find out why there is such confusion among the seemingly simple PCI Express peripheral port. And what is the purpose of each PCI Express x2, x4, x8, x12, x16 and x32 standard?
What is the PCI Express bus?
Back in the 2000s, when the transition took place from the aging PCI (extended - interconnection of peripheral components) standard to PCI Express, the latter had one huge advantage: instead of a serial bus, which was PCI, a point-to-point access bus was used. This meant that each individual PCI port and the cards installed in it could take full advantage of the maximum bandwidth without interfering with each other, as happened with a PCI connection. In those days, the number of peripheral devices inserted into expansion cards was abundant. Network cards, audio cards, TV tuners, and so on - all required a sufficient amount of PC resources. But unlike the PCI standard, which used a common bus for data transfer with multiple devices connected in parallel, PCI Express, when considered in general, is a packet network with a star topology.
PCI Express x16, PCI Express x1 and PCI on one board
In layman's terms, imagine your desktop PC as a small store with one or two salespeople. The old PCI standard was like a grocery store: everyone waited in one line to be served, experiencing speed issues with the limitation of one salesperson behind the counter. PCI-E is more like a hypermarket: each customer follows his own individual route for groceries, and at the checkout, several cashiers take the order at once.
Obviously, a hypermarket is several times faster than a regular store in terms of speed of service, due to the fact that the store cannot afford the capacity of more than one salesperson with one cash register.
Also with dedicated data lanes for each expansion card or built-in motherboard components.
The influence of the number of lines on throughput
Now, to extend our store and hypermarket metaphor, imagine that each department of the hypermarket has its own cashiers reserved just for them. This is where the idea of multiple data lanes comes into play.
PCI-E has gone through many changes since its inception. These days, new motherboards typically use version 3 of the standard, with the faster version 4 becoming more common, with version 5 expected in 2019. But different versions use the same physical connections, and these connections can be made in four main sizes: x1, x4, x8 and x16. (x32 ports exist, but are extremely rare on regular computer motherboards).
The different physical sizes of PCI-Express ports make it possible to clearly divide them by the number of simultaneous connections to the motherboard: the larger the port is physically, the more maximum connections it can transmit to the card or vice versa. These connections are also called lines. One line can be thought of as a track consisting of two signal pairs: one for sending data and the other for receiving.
Different versions of the PCI-E standard allow different speeds on each lane. But generally speaking, the more lanes there are on a single PCI-E port, the faster data can flow between the peripheral and the rest of the computer.
Returning to our metaphor: if we are talking about one seller in a store, then the x1 strip will be this only seller serving one client. A store with 4 cashiers already has 4 lines x4. And so on, you can assign cashiers by the number of lines, multiplying by 2.
Various PCI Express cards
Types of devices using PCI Express x2, x4, x8, x12, x16 and x32
For the PCI Express 3.0 version, the overall maximum data transfer speed is 8 GT/s. In reality, the speed for the PCI-E 3 version is slightly less than one gigabyte per second per lane.
Thus, a device using the PCI-E x1 port, for example, a low-power sound card or Wi-Fi antenna, will be able to transfer data at a maximum speed of 1 Gbit/s.
A card that physically fits into a larger slot - x4 or x8, for example, a USB 3.0 expansion card will be able to transfer data four or eight times faster, respectively.
The transfer speed of PCI-E x16 ports is theoretically limited to a maximum bandwidth of about 15 Gbps. This is more than enough in 2017 for all modern graphics cards developed by NVIDIA and AMD.
Most discrete graphics cards use a PCI-E x16 slot
The PCI Express 4.0 protocol allows the use of 16 GT/s, and PCI Express 5.0 will use 32 GT/s.
But currently there are no components that could use this number of lanes with maximum throughput. Modern high-end graphics cards usually use x16 PCI Express 3.0. It makes no sense to use the same lanes for a network card that will only use one lane on the x16 port, since the Ethernet port is only capable of transferring data up to one gigabit per second (which is about one-eighth the throughput of one PCI-E lane - remember: eight bits in one byte).
There are PCI-E SSDs on the market that support the x4 port, but they look set to be replaced by the rapidly evolving new M.2 standard. for SSDs that can also use the PCI-E bus. High-end network cards and enthusiast hardware such as RAID controllers use a combination of x4 and x8 formats.
PCI-E port and lane sizes may vary
This is one of the most confusing problems with PCI-E: a port can be made in the x16 form factor, but not have enough lanes to pass data, for example, just x4. This is because even though PCI-E can carry an unlimited number of individual connections, there is still a practical limit to the chipset's bandwidth capacity. Cheaper motherboards with lower-end chipsets may only have one x8 slot, even if that slot can physically accommodate an x16 form factor card.
Additionally, motherboards aimed at gamers include up to four full PCI-E slots with x16 and the same number of lanes for maximum bandwidth.
Obviously this can cause problems. If the motherboard has two x16 slots, but one of them only has x4 lanes, then adding a new graphics card will reduce the performance of the first by as much as 75%. This is, of course, only a theoretical result. The architecture of motherboards is such that you will not see a sharp drop in performance.
The correct configuration of two graphics video cards should use exactly two x16 slots if you want maximum comfort from a tandem of two video cards. The manual at the office will help you find out how many lines a particular slot has on your motherboard. manufacturer's website.
Sometimes manufacturers even mark the number of lines on the motherboard PCB next to the slot
You need to know that a shorter x1 or x4 card can physically fit into a longer x8 or x16 slot. The pin configuration of the electrical contacts makes this possible. Naturally, if the card is physically larger than the slot, then you won’t be able to insert it.
Therefore, remember, when purchasing expansion cards or upgrading current ones, you must always remember both the size of the PCI Express slot and the number of lanes required.
In the spring of 1991, Intel completed development of the first prototype version of the PCI bus. The engineers were tasked with developing an inexpensive and high-performance solution that would realize the capabilities of the 486, Pentium and Pentium Pro processors. In addition, it was necessary to take into account the mistakes made by VESA when designing the VLB bus (the electrical load did not allow connecting more than 3 expansion cards), as well as to implement automatic device configuration.
In 1992, the first version of the PCI bus appeared, Intel announced that the bus standard would be open, and created the PCI Special Interest Group. Thanks to this, any interested developer has the opportunity to create devices for the PCI bus without the need to purchase a license. The first version of the bus had a clock frequency of 33 MHz, could be 32- or 64-bit, and devices could operate with signals of 5 V or 3.3 V. Theoretically, the bus throughput was 133 MB / s, but in reality the throughput was about 80 MB/s
Key Features:
- bus frequency - 33.33 or 66.66 MHz, synchronous transmission;
- bus width - 32 or 64 bits, multiplexed bus (address and data are transmitted over the same lines);
- peak throughput for the 32-bit version operating at 33.33 MHz is 133 MB/s;
- memory address space - 32 bits (4 bytes);
- address space of I/O ports - 32 bits (4 bytes);
- configuration address space (for one function) - 256 bytes;
- voltage - 3.3 or 5 V.
Photos of connectors:
MiniPCI - 124 pin | |
MiniPCI Express MiniSata/mSATA - 52 pin | |
Apple MBA SSD, 2012 | |
Apple SSD, 2012 | |
Apple PCIe SSD | |
MXM, Graphics Card, 230 / 232 pin | |
MXM2 NGIFF 75 pins KEY A PCIe x2 KEY B PCIe x4 Sata SMBus |
|
MXM3, Graphics Card, 314 pin | |
PCI 5V | |
PCI Universal | |
PCI-X 5v | |
AGP Universal | |
AGP 3.3v | |
AGP 3.3 v + ADS Power | |
PCIe x1 | |
PCIe x16 | |
Custom PCIe | |
ISA 8bit | |
ISA 16bit | |
eISA | |
VESA | |
NuBus | |
PDS | |
PDS | |
Apple II/GS Expasion slot | |
PC/XT/AT expasion bus 8 bit | |
ISA (industry standard architecture) - 16 bit | |
eISA | |
MBA - Micro Bus architecture 16 bit | |
MBA - Micro Bus architecture with 16 bit video | |
MBA - Micro Bus architecture 32 bit | |
MBA - Micro Bus architecture with 32 bit video | |
ISA 16 + VLB (VESA) | |
Processor Direct Slot PDS | |
601 Processor Direct Slot PDS | |
LC Processor Direct Slot PERCH | |
NuBus | |
PCI (Peripheral Computer Interconnect) - 5v | |
PCI 3.3v | |
CNR (Communications / network riser) | |
AMR (Audio/Modem Riser) | |
ACR (Advanced communication riser) | |
PCI-X (Peripheral PCI) 3.3v | |
PCI-X 5v | |
PCI 5v + RAID option - ARO | |
AGP 3.3v | |
AGP 1.5v | |
AGP Universal | |
AGP Pro 1.5v | |
AGP Pro 1.5v+ADC power | |
PCIe (peripheral component interconnect express) x1 | |
PCIe x4 | |
PCIe x8 | |
PCIe x16 |
PCI 2.0
The first version of the basic standard to become widespread used both cards and slots with a signal voltage of only 5 volts. Peak throughput - 133 MB/s.
PCI 2.1 - 3.0
They differed from version 2.0 in the possibility of simultaneous operation of several bus masters (English bus-master, so-called competitive mode), as well as the appearance of universal expansion cards capable of operating both in slots using a voltage of 5 volts, and in slots using 3 .3 volts (with a frequency of 33 and 66 MHz, respectively). Peak throughput for 33 MHz is 133 MB/s, and for 66 MHz it is 266 MB/s.
- Version 2.1 - work with cards designed for a voltage of 3.3 volts, and the presence of appropriate power lines were optional.
- Version 2.2 - expansion cards made in accordance with these standards have a universal power connector key and are able to work in many later types of PCI bus slots, as well as, in some cases, in version 2.1 slots.
- Version 2.3 - Incompatible with PCI cards designed to use 5 volts, despite the continued use of 32-bit slots with a 5 volt key. Expansion cards have a universal connector, but are not able to work in 5-volt slots of earlier versions (up to 2.1 inclusive).
- Version 3.0 - completes the transition to 3.3 volt PCI cards, 5 volt PCI cards are no longer supported.
PCI 64
An extension of the basic PCI standard, introduced in version 2.1, that doubles the number of data lanes, and therefore the throughput. The PCI 64 slot is an extended version of the regular PCI slot. Formally, the compatibility of 32-bit cards with 64-bit slots (provided there is a common supported signal voltage) is full, but the compatibility of a 64-bit card with 32-bit slots is limited (in any case there will be a loss of performance). Operates at a clock frequency of 33 MHz. Peak throughput - 266 MB/s.
- Version 1 - uses a 64-bit PCI slot and a voltage of 5 volts.
- Version 2 - uses a 64-bit PCI slot and a voltage of 3.3 volts.
PCI 66
PCI 66 is a 66 MHz evolution of PCI 64; uses 3.3 volts in the slot; the cards have a universal or 3.3 V form factor. Peak throughput is 533 MB/s.
PCI 64/66
The combination of PCI 64 and PCI 66 allows for four times the data transfer speed of the basic PCI standard; uses 64-bit 3.3V slots, compatible only with universal ones, and 3.3V 32-bit expansion cards. PCI64/66 cards have either a universal (but with limited compatibility with 32-bit slots) or a 3.3-volt form factor (the latter option is fundamentally incompatible with 32-bit 33-MHz slots of popular standards). Peak throughput - 533 MB/s.
PCI-X
PCI-X 1.0 is an expansion of the PCI64 bus with the addition of two new operating frequencies, 100 and 133 MHz, as well as a separate transaction mechanism to improve performance when multiple devices operate simultaneously. Generally backward compatible with all 3.3V and generic PCI cards. PCI-X cards are usually implemented in a 64-bit 3.3B format and have limited backward compatibility with PCI64/66 slots, and some PCI-X cards are in a universal format and are capable of working (although this has almost no practical value) in a regular PCI 2.2/2.3. In difficult cases, in order to be completely confident in the functionality of the combination of the motherboard and expansion card, you need to look at the compatibility lists of the manufacturers of both devices.
PCI-X 2.0
PCI-X 2.0 - further expansion of the capabilities of PCI-X 1.0; frequencies of 266 and 533 MHz have been added, as well as parity error correction during data transmission (ECC). Allows splitting into 4 independent 16-bit buses, which is used exclusively in embedded and industrial systems; The signal voltage has been reduced to 1.5 V, but the connectors are backward compatible with all cards using a signal voltage of 3.3 V. Currently, for the non-professional segment of the high-performance computer market (powerful workstations and entry-level servers), in which it is used PCI-X bus; very few motherboards supporting the bus are produced. An example of a motherboard for this segment is ASUS P5K WS. In the professional segment it is used in RAID controllers and SSD drives for PCI-E.
Mini PCI
Form factor PCI 2.2, intended for use mainly in laptops.
PCI Express
PCI Express, or PCIe, or PCI-E (also known as 3GIO for 3rd Generation I/O; not to be confused with PCI-X and PXI) - computer bus(although at the physical level it is not a bus, being a point-to-point connection), using software model PCI buses and a high-performance physical protocol based on serial data transmission. The development of the PCI Express standard was started by Intel after abandoning the InfiniBand bus. Officially, the first basic PCI Express specification appeared in July 2002. The development of the PCI Express standard is carried out by the PCI Special Interest Group.
Unlike the PCI standard, which used a common bus for data transfer with multiple devices connected in parallel, PCI Express, in general, is a packet network with star topology. PCI Express devices communicate with each other through a medium formed by switches, with each device directly connected by a point-to-point connection to the switch. In addition, the PCI Express bus supports:
- hot swap cards;
- guaranteed bandwidth (QoS);
- energy management;
- monitoring the integrity of transmitted data.
The PCI Express bus is intended to be used only as a local bus. Since the PCI Express software model is largely inherited from PCI, existing systems and controllers can be modified to use the PCI Express bus by replacing only the physical layer, without modifying the software. The high peak performance of the PCI Express bus allows it to be used instead of AGP buses, and even more so PCI and PCI-X. De facto, PCI Express replaced these buses in personal computers.
- MiniCard (Mini PCIe) - replacement for the Mini PCI form factor. The Mini Card connector has the following buses: x1 PCIe, 2.0 and SMBus.
- M.2 is the second version of Mini PCIe, up to x4 PCIe and SATA.
- ExpressCard - similar to PCMCIA form factor. The ExpressCard connector supports x1 PCIe and USB 2.0 buses; ExpressCard cards support hot plugging.
- AdvancedTCA, MicroTCA - form factor for modular telecommunications equipment.
- Mobile PCI Express Module (MXM) is an industrial form factor created for laptops by NVIDIA. It is used to connect graphics accelerators.
- PCI Express cable specifications allow the length of one connection to reach tens of meters, which makes it possible to create a computer whose peripheral devices are located at a considerable distance.
- StackPC is a specification for building stackable computer systems. This specification describes the expansion connectors StackPC, FPE and their relative positions.
Despite the fact that the standard allows x32 lines per port, such solutions are physically quite bulky and are not available.
Year release |
Version PCI Express |
Coding | Speed transfers |
Bandwidth on x lines | ||||
---|---|---|---|---|---|---|---|---|
×1 | ×2 | ×4 | ×8 | ×16 | ||||
2002 | 1.0 | 8b/10b | 2.5 GT/s | 2 | 4 | 8 | 16 | 32 |
2007 | 2.0 | 8b/10b | 5 GT/s | 4 | 8 | 16 | 32 | 64 |
2010 | 3.0 | 128b/130b | 8 GT/s | ~7,877 | ~15,754 | ~31,508 | ~63,015 | ~126,031 |
2017 | 4.0 | 128b/130b | 16 GT/s | ~15,754 | ~31,508 | ~63,015 | ~126,031 | ~252,062 |
2019 |
5.0 | 128b/130b | 32 GT/s | ~32 | ~64 | ~128 | ~256 | ~512 |
PCI Express 2.0
The PCI-SIG released the PCI Express 2.0 specification on January 15, 2007. Key innovations in PCI Express 2.0:
- Increased throughput: bandwidth of one line 500 MB/s, or 5 GT/s ( Gigatransactions/s).
- Improvements have been made to the transfer protocol between devices and the software model.
- Dynamic speed control (to control the communication speed).
- Bandwidth alert (to notify software of changes in bus speed and width).
- Access Control Services - Optional point-to-point transaction management capabilities.
- Execution timeout control.
- Function level reset is an optional mechanism for resetting PCI functions within a PCI device.
- Redefining the power limit (to redefine the slot power limit when connecting devices that consume more power).
PCI Express 2.0 is fully compatible with PCI Express 1.1 (old ones will work in motherboards with new connectors, but only at a speed of 2.5 GT/s, since old chipsets cannot support double data transfer rates; new video adapters will work without problems in old PCI Express 1.x connectors).
PCI Express 2.1
In terms of physical characteristics (speed, connector) it corresponds to 2.0; in the software part, functions have been added that are planned to be fully implemented in version 3.0. Since most motherboards are sold with version 2.0, having only a video card with 2.1 does not allow you to use 2.1 mode.
PCI Express 3.0
In November 2010, the specifications for PCI Express 3.0 were approved. The interface has a data transfer rate of 8 GT/s ( Gigatransactions/s). But despite this, its actual throughput was still doubled compared to the PCI Express 2.0 standard. This was achieved thanks to a more aggressive 128b/130b encoding scheme, where 128 bits of data sent over the bus are encoded in 130 bits. At the same time, full compatibility with previous versions of PCI Express is maintained. PCI Express 1.x and 2.x cards will work in slot 3.0 and, conversely, a PCI Express 3.0 card will work in slots 1.x and 2.x.
PCI Express 4.0
The PCI Special Interest Group (PCI SIG) stated that PCI Express 4.0 could be standardized before the end of 2016, but in mid-2016, when a number of chips were already being prepared for production, media reported that standardization was expected in early 2017. will have a throughput of 16 GT/s, that is, it will be twice as fast as PCIe 3.0.
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